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 2.9x1.6mm
package size
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•3、5、6
pin counts
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1.9mm
lead pitch
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•
SOT
die thickness 0.95mm
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TSOT
die thickness 0.75mm
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JEDEC
standard outlines |
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RF/wireless
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Analog
devices
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Process of SOT/TSOT with BOM |
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Process
flow
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Material
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Wafer Back
Grinding
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Wafer Mount
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Wafer Saw
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2nd Optical
Inspection
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Die Bond
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Epoxy Curing
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Wire Bond
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Gold wire
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Molding
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compound
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Marking
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Sn |
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FVI
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Packing
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SOT/TSOT Reliability Test
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•Moisture
Sensitivity Test: JEDEC Level 3
(30℃
85%RH 168hrs)
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•Temperature
Cycle Test: JESD22-A104C
(-65℃/5min~150℃/5min
500cycles)
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•Pressure
Cooker: JESD22-A102-C
(121℃
2 atm 100%RH 168hrs)
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•High
Temperature Storage Life: JESD22-A103C
(150℃
1000hrs)
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